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Founders Mentioned

Madhulima Tewari

VerifAIX

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Kenneth Roe

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Avner Landver

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Madhulima Tewari

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September 16, 2026
Semiconductor TechAi HardwareSeed FundingHardware DesignFormal Verification

VerifAIX raises $5M to verify AI-designed chips

Seed round led by Endiya Partners and Bluehill VC will fund AI-native verification platform as semiconductor industry grapples with rising design complexity.

VerifAIX raises $5M to verify AI-designed chips

VerifAIX, a Cupertino startup tackling one of the semiconductor industry's thorniest problems, disclosed a $5 million seed round on September 15, co-led by Endiya Partners and Bluehill VC. The company's pitch: as artificial intelligence increasingly generates chip designs, the industry needs an independent system to verify those designs actually work.

It's a timely bet. First-silicon success rates have plummeted to their lowest point in two decades. Only 14 percent of ASIC and system-on-chip projects successfully reached first silicon in 2024, according to a Siemens EDA and Wilson Research study published in 2025. With advanced-node mask sets costing $10 million to $20 million and three-nanometer wafers running between $20,000 and $25,000 apiece, the financial consequences of a flawed design have never been steeper.

"Generating a design is not the same as proving that it is correct," CEO Madhulima Tewari said in the announcement. "The industry urgently needs an independent layer of trust."

VerifAIX declined to disclose its valuation or provide details about earlier funding from angel investors and industry advisors, the Economic Times ETtech reported. The company has between two and ten employees, according to its LinkedIn profile as of mid-September.

At the core of VerifAIX's platform is what the company calls a "Formal Brain"—a mathematically grounded model of a chip's specifications and intended behavior. Its VerificationAI product orchestrates formal verification and simulation through existing EDA tools, triages counterexamples when problems surface, and flags coverage gaps. The platform is already deployed at multiple semiconductor companies working on control-intensive IP and protocol-heavy designs, though VerifAIX has not named customers publicly.

The founding team brings heavyweight credentials. Tewari's background spans AI, natural language processing, enterprise software, and semiconductor EDA. Co-founder and Chief Architect Kenneth Roe previously worked at Intel, SiFive, and Synopsys. Co-founder Avner Landver spent years in formal verification at Apple, Intel, Cadence, and IBM Research. Princeton computer science professor Aarti Gupta serves as a founding consultant, while semiconductor veteran Vinod Dham—known for his work on the Intel Pentium—is both a founding advisor and investor.

Digital illustration for article section "Content Section 2" in "VerifAIX raises $5M to verify AI-designed chips" - A clean, minimalist conceptual image representing a heavyweight foundational architecture of AI and ...

The company plans to use the capital for product development, customer deployments, and engineering expansion across the United States, India, and Israel, according to ETtech. VerifAIX has established an Indian subsidiary, though the exact timeline of its international operations remains somewhat opaque.

The startup enters a market where established EDA giants are rapidly integrating AI into their own verification workflows. Cadence launched ChipStack AI Super Agent for front-end design and verification earlier this year and has promoted what it calls a "fully autonomous virtual engineer." Siemens EDA rolled out its Fuse EDA AI Agent, and Real Intent introduced the Riven Sign-Off AI Agent. VerifAIX positions its spec-first "Formal Brain" and deterministic validation as a contrast to code-generation approaches, emphasizing mathematical rigor over probabilistic outputs.

"There's never been a more pressing need for independent verification," said Medha Kannapally of Endiya Partners.

Digital illustration for article section "Content Section 3" in "VerifAIX raises $5M to verify AI-designed chips" - A conceptual, minimalist representation of independent verification featuring a pristine, perfectly ...

Sridhar Parthasarathy of Bluehill VC, which closed a ₹400 crore maiden fund in August, described the approach as "combining AI reasoning with deterministic, mathematically rigorous verification methods."

VerifAIX exhibited at the Design Automation Conference and Tewari spoke at SEMICON West on building what she termed the trust layer for autonomous chip design. Whether the market will embrace an independent verification layer—or prefer integrated tools from established vendors—remains an open question. For now, the company is betting that as AI takes on more of the design workload, someone needs to check its homework.

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