Jim Keller made his name perfecting processor designs at AMD, Apple, Tesla, Intel—the kind of elite resume that signals you've spent decades in the trenches of silicon architecture. Now he's attempting something considerably stranger: manufacturing facilities that manufacture facilities.
On July 5, 2026, Keller's startup Atomic Semi rebranded as Fab2 and unveiled a pivot that sounds almost perverse by industry standards. The company plans to mass-produce small semiconductor fabrication plants—and every tool inside them. "Building a semiconductor fab fab to make lots of fabs," as the tagline puts it, with the sort of recursive logic that either signals brilliance or folly.
It's a striking reversal of momentum in an industry that has spent the better part of a generation consolidating around ever-larger, ever-more-expensive centralized manufacturing. While hyperscalers sink hundreds of billions into AI infrastructure and foundries race to complete $20 billion megafabs, Fab2 is wagering on distributed manufacturing at a radically compressed scale. The company now runs three sites: a 120,000-square-foot chip fab in Austin, a 30,000-square-foot "fab fab" in nearby Lockhart that's expanding, and a 25,000-square-foot "garage fab" in San Francisco. Tom's Hardware reported on July 5, 2026, that the geographic pivot from California to Texas tracks the strategic one—most hiring and operations are concentrated in the Lone Star State now, with the company employing roughly 84 people according to third-party estimates.
Whether this represents a genuine rupture in semiconductor economics or an expensive curiosity remains an open question.
The Gravitational Pull of Scale
The semiconductor industry has been doubling down on concentration for years, and the numbers keep getting more extreme. SEMI projected in April 2026 that global 300mm fab equipment spending would climb 18 percent to $133 billion that year, then another 14 percent to $151 billion in 2027—fueled overwhelmingly by AI demand and memory buildouts. By June, SEMI's updated forecast showed the memory sector alone crossing $50 billion in equipment spending. The organization tracks 404 separate 300mm fab lines worldwide, with 18 new fabs breaking ground in 2025.
The logic of these facilities is relentless. Leading-edge nodes—TSMC's N3, N2, whatever comes next—require tens of billions in capital per fab module. Industry analysts floated the concept of a "Terafab" in March 2026, a hypothetical megaproject that could demand multi-trillion-dollar investments to hit exascale AI compute capacity. The economics favor centralization: spread staggering tooling costs across millions of wafers, chase Moore's Law to the bleeding edge, serve the customers with the deepest pockets.
That model has delivered extraordinary performance gains. It's also created brittleness. A single fab line goes down, supply chains seize. When export controls restrict advanced lithography equipment—as the U.S. and Dutch governments did progressively from October 2023 onward, targeting DUV immersion tools while maintaining EUV restrictions—entire nations scramble for workarounds. ASML's China revenue declined to roughly 20 percent of its mix in 2026, reflecting these tightening technology access controls. Reports from October 2025 highlighted Chinese rare-earth material curbs affecting 14nm-class and 256-layer production, adding yet another vulnerability vector.
So the megafab momentum continues, but the cracks are showing.
The Long Tail Thesis
Keller's bet hinges on a different set of economics: the long tail. He said as much in an October 2025 interview, observing that "the long tail of small applications is very large." These aren't the high-volume smartphone or datacenter chips that justify $15 billion fabs. They're rapid ASIC prototypes, MEMS sensors, photonics, radiation-hardened devices, specialty analog, research chips—custom silicon for startups that need 100 units, not 100 million.
Traditional foundries serve this market poorly, if at all. Multiproject wafer shuttles aggregate small orders but impose rigid schedules and shared process constraints. Offshore production adds weeks or months of latency. For a hardware startup iterating on a sensor design or a university lab validating a novel transistor structure, that cycle time can be crushing. The same friction extends to defense applications, where trusted, low-volume production and rapid prototyping matter more than cost per transistor.
Fab2's model flips the equation. Instead of building one enormous facility optimized for throughput, it's designing modular, software-defined fabs that can be replicated and distributed. The company says it "makes every tool in the fab" and "makes software to design and print any chip," integrating everything from pumps and valves to chambers, heaters, actuators, and control boards in-house. The "Studio" platform—an in-browser collaborative EDA tool—aims to complete the stack, offering design-to-silicon workflows without the licensing overhead or infrastructure complexity of conventional toolchains.
Which sounds appealing until you examine the tradeoffs.
The Throughput Problem
Tom's Hardware noted on July 5, 2026, that Fab2's approach likely relies on direct-write methods such as electron-beam lithography. E-beam offers sub-10nm resolution but extremely limited throughput compared to EUV projection systems patterning 300mm wafers. It's a staple in mask shops and R&D labs—NIST operates a Raith EBPG 5200+ tool, JEOL's JBX systems are widely deployed—but it's fundamentally sequential, writing one pixel at a time. That makes it suitable for tens or hundreds of devices per run. Not tens of thousands.
Fab2 isn't alone in this pursuit. InchFab, another U.S. startup, has been developing containerized "fab in a box" systems priced between $5 million and $15 million, targeting rapid deployment for custom and low-volume production. Coverage in May 2026 from IEEE Spectrum and TechRadar positioned InchFab as aiming to "do for microchips what IBM did for PCs"—democratize access through modular, affordable infrastructure.
The comparison is flattering but possibly premature.
The distributed fab model gains some plausibility from maturing alternative patterning technologies, though. Canon's nanoimprint lithography has advanced considerably through 2024-2026, with the company shipping its first 300mm NIL tool to the Texas Institute for Electronics in September-October 2024. Canon claims NIL consumes one-tenth the power of EUV and could enable advanced-node features on specific layers at dramatically lower capital cost. In January 2026, Canon announced inkjet-based planarization technology for NIL, and Japan's DNP is targeting 1.4nm template mass production by 2027.
The caveat? No major logic foundry has committed NIL for high-volume manufacturing as of early 2026. But the technology is maturing for niche and prototyping applications—precisely where Fab2's fabs would compete.
Texas as Testbed
Texas has become a natural home for this infrastructure. Texas Instruments began production at its new 300mm fab in Sherman on December 17, 2025. Coherent and NVIDIA broke ground on a $650 million expansion in Sherman in June 2026. The Texas Institute for Electronics—anchored by UT Austin and backed by $1.4 billion in combined funding under DARPA's Next-Generation Microelectronics Manufacturing program—operates as a high-mix, low-volume 3D heterogeneous integration hub. TIE received the first Canon NIL tool and has been ramping workforce programs with Austin Community College since March 2024, creating a regional ecosystem for specialized manufacturing talent.
Federal incentives accelerated the buildout. CHIPS for America awards through 2024-2026 committed billions to Intel, TSMC Arizona, Samsung Texas, GlobalFoundries, and specialty foundries like SkyWater, which received a proposed $16 million award in December 2024 to support its open PDK SKY130 process. The IRS issued guidance in March 2024 for the Advanced Manufacturing Investment Credit—a 25 percent investment tax credit for semiconductor manufacturing facilities and equipment with elective pay provisions. Relevant economics for companies building or buying small fabs.
SkyWater's open PDK has been particularly enabling. First released in 2020 and continuously updated through 2023-2026, SKY130 lowered design barriers for universities, startups, and hobbyists. Google-sponsored multiproject wafer shuttles launched in 2021, aggregating dozens of open-source designs per run. That reduced the friction between concept and silicon, validating demand for accessible fabrication—at least at the design stage.
The Market Question
Who needs a small fab? The market segments are varied, if not enormous.
Defense and government applications require trusted, low-volume production for radiation-hardened parts, secure communication chips, and custom ASICs that can't be outsourced. DARPA's NGMM program explicitly focuses on high-mix, low-volume prototyping and 3D integration R&D—complementary to front-end small fabs.
Academic research depends on rapid iteration. A university group working on novel transistor structures or neuromorphic circuits needs design-to-device turnaround measured in weeks, not quarters. National labs and corporate R&D facilities already operate electron-beam lithography tools for exactly this reason—NIST's Raith system, Penn State's JEOL tools—but these are shared-access instruments with limited capacity.
Startups building custom silicon face a chicken-and-egg problem. Conventional foundry economics demand minimum order quantities and upfront NRE that make early-stage prototyping prohibitively expensive. Multi-project wafer runs aggregate designs but constrain process choices and impose shared schedules. A startup iterating on a photonics chip or a biosensor doesn't fit cleanly into either model. Small fabs offer a third path: pay for access, iterate quickly, scale production elsewhere once the design stabilizes.
MEMS, sensors, and specialty analog also fit the profile. These devices often use older nodes—180nm, 130nm, even micron-scale features—where throughput matters less than design flexibility and turnaround time. The open PDK movement has begun to address design access; small fabs could address fabrication access.
Perhaps. The word "could" does a lot of work here.
The Constraints Are Real
Throughput economics don't scale. A direct-write fab producing 50 devices per week can't compete with a foundry stamping 10,000 wafers per day. The capital cost per unit rises sharply at low volumes—tolerable for prototyping but prohibitive for production. Fab2 and InchFab are targeting the prototyping and low-volume niches explicitly, but that market may be smaller than the hype suggests.
Toolchain maturity also remains uncertain. NIL is promising but unproven in high-volume logic manufacturing. E-beam is mature for masks and R&D but constrained by fundamental physics in throughput. Conventional lithography steppers—even older models—remain expensive and complex to operate. The vision of "every tool in the fab" built in-house implies significant IP development and manufacturing capability, which is difficult and capital-intensive to execute at scale. Keller has the pedigree to attempt it, but pedigree doesn't guarantee execution.
Regulatory and supply-chain risks cut both ways. Export controls and materials tensions make certain equipment harder to source or service, which could hinder small fab deployments. But those same pressures create demand for alternative toolchains and domestic capacity, particularly in applications where leading-edge nodes aren't required.
Workforce remains a bottleneck. Operating even a small fab requires cleanroom discipline, process engineering expertise, and equipment maintenance skills. Texas workforce initiatives and TIE's training programs help, but scaling distributed fabs means scaling distributed talent—a harder problem than replicating hardware.
Centralization and Fragmentation, Simultaneously
The semiconductor industry is simultaneously centralizing and fragmenting, which sounds contradictory until you look closely. Centralization continues at the leading edge, where AI and high-performance compute drive investment in ever-larger, ever-more-capable fabs. But fragmentation is emerging at the periphery—in prototyping, in specialty devices, in regional hubs backed by government programs seeking supply-chain resilience.
Fab2's bet is that the periphery is larger than it looks. The company's three facilities and roughly 84 employees (per a May 2026 third-party estimate via Tracxn reported by Tom's Hardware) represent an early-stage operation, but the ambition is manufacturing at scale—building enough "fab fabs" to supply small fabs as a category. Early funding reportedly included OpenAI Startup Fund leading a roughly $15 million seed at a $100 million valuation, according to TechCrunch reporting from January 2023, though this remains unconfirmed and no updated funding information has been officially disclosed in 2026.
If the model works, it would reshape access to silicon in meaningful ways. Universities could fabricate research chips on-site. Defense contractors could produce trusted, low-volume parts domestically. Startups could iterate ASIC designs in weeks instead of quarters. Regional innovation hubs could pair packaging centers like TIE with front-end small fabs, creating vertically integrated ecosystems outside the traditional foundry supply chain.
The alternative patterning technologies—NIL, maskless laser direct-write, advanced e-beam—provide enabling ingredients. Open PDKs lower design barriers. Federal and state incentives subsidize infrastructure. The question is whether demand for distributed, low-volume capacity justifies the capital and operational complexity of building and operating many small fabs. That's not a trivial question.
McKinsey projected in mid-2026 that semiconductor revenue could reach $1.6 trillion by 2030, driven by AI infrastructure and system co-optimization. Deloitte's February 2026 outlook highlighted the shift toward advanced packaging and heterogeneous integration. Both trends favor specialization and flexibility over pure scale. If the next era of chip manufacturing involves more diversity in devices, applications, and production models, then perhaps the industry needs both megafabs and microfabs—scale for volume, distribution for variety.
Fab2's pivot tests that hypothesis directly. The company is no longer designing chips. It's designing the infrastructure to let others design and build chips faster, closer, and cheaper than the incumbent model allows. Whether that vision scales from three facilities to thirty or three hundred will depend on execution, economics, and whether the long tail Keller identified turns out to be as large as he believes.
The semiconductor industry has seen plenty of contrarian bets over the decades. Some reshape the landscape. Most don't. Keller's track record earns him a serious hearing, but the gap between a compelling thesis and a sustainable business remains wide—and the company has a lot to prove.
